FB2050
Foundation Fieldbus Communication Controller

• Based on the IEC 1158-2 / ISA SP50.02 Physical Layer Standard for Fieldbus;
• Provides software selectable full and half duplex communications;
• Software controlled FCS generation for transmitter and automatic frame check sequence (FCS) detection for receiver;
• Compatible with most microprocessors and microcontrollers with special Interface pins provided for the Motorola M68HC11 Microprocessor;
• RAM and PROM paging and chip-select logic provided to reduce system chip count;
• 31.25 Kbit/sec Data Rate;
• Automatic Polarity Detection and Correction for Incoming Manchester Signal;
• Low Power Consumption (Typically 0.6 mA @ 1.25 MHz);
• Transmitter jabber inhibit circuitry;
• Available in 100 Pin PQFP Packaging;